As electronic devices become increasingly compact and lightweight, it becomes increasingly desirable to reduce the size of integrated circuit chip (IC chip) packages. In addition to reducing the size of IC chip packages, it is also desirable to simultaneously decrease the manufacturing cost of IC chip packages.
As the spacing between IC chip packages and other electronic components decreases, shielding becomes increasingly important. Shielding prevents radiation emanating from an IC chip package from interfering with adjacent electronic components and also prevents radiation emanating from the adjacent electronic components from interfering with the IC chip package (this type of radiation is typically referred to as crosstalk). Shielding is typically accomplished by covering the IC chip package and/or electronic components with a preformed piece of metal such as copper. However, metal shielding is relatively expensive and inhibits reduction in weight and size of electronic devices.
Higgins, U.S. Pat. No. 5,639,989 (hereinafter Higgins), herein incorporated by reference in its entirety, teaches a method of shielding an electronic component assembly. The method includes forming a conformal electrically insulating layer over a semiconductor device and over signal traces. An electrically conductive conformal shielding layer is then deposited over the insulating layer, wherein the electrically conductive shielding layer is a particulate-filled polymer.
As shown in Higgins FIG. 2, the conformal electrically insulating/conductive layers are formed after the semiconductor devices are attached to a larger substrate such as a printed circuit board. In this manner, crosstalk between adjacent semiconductor devices is prevented. However, applying the electrically insulating/conductive layers after the semiconductor devices are attached to the printed circuit board adds complexity to the manufacturing process and hinders reworking the assembly. Accordingly, it is desirable to incorporate shielding into the IC chip packaging itself thus avoiding the additional manufacturing step of shielding after the IC chip packages are assembled to the printed circuit board.
Lin, U.S. Pat. No. 5,436,203 (hereinafter Lin), herein incorporated by reference in its entirety, teaches a shielded IC chip package. Referring to Lin FIG. 15, to form the shielded IC chip package, a first dam structure 40 is formed and used to constrain the flow of an electrically insulating encapsulant 38. After IC chip 32 is encapsulated in electrically insulating encapsulant 38, a second dam structure 44 is formed and used to constrain the flow of an electrically conductive encapsulant 42.
Electrically conductive encapsulant 42 is electrically tied to an internal reference plane 22 by reference pads 18 and conductive vias 20. Thus, IC chip 32 is effectively shielded from both the top and bottom by the combination of electrically conductive encapsulant 42 and internal reference plane 22.
Although the shielded IC chip package of Lin is effective in shielding, the resulting package is relatively large and expensive to manufacture. In particular, a first amount of substrate area is necessary to form first dam structure 40, a second amount of substrate area is necessary to form second dam structure 44 and a third amount of substrate area between dam structure 40 and 44 is necessary to allow electrical interconnection between electrically conductive encapsulant 42 and reference pads 18. As a result, the shielded IC chip package of Lin is substantially larger than the package IC chip 32. Further, formation of two dam structure 40 and 44 is relatively complex, adding to the manufacturing cost of forming the shielded IC chip package. Accordingly, a need exists for a shielded IC chip package which is near chip size, lightweight and relatively inexpensive to manufacture.